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NO. 004

x86指令级精确控制浮点舍入

#ARTICLE HackerNews 2026.10.13
推荐指数 65.0 NO. 004 · 2026.10.13
发布2026/10/12Score84Comments3

Intel FMA指令集新增vfmaddrnd231pd,支持单条指令独立设置舍入模式、DAZ/FTZ和异常抑制,无需修改全局MXCSR寄存器。对数值计算密集型AI训练和科学仿真可消除舍入模式切换开销,提升确定性计算性能。

MXCSR切换在深度学习训练里是个隐藏性能杀手,PyTorch的torch.set_float32_matmul_precision背后就涉及这类状态变更,多线程场景下更糟。这条指令相当于把CUDA的ftz/daz模式控制下放到x86单条指令粒度。

做量化训练或需要bit-exact reproducibility的分布式训练框架(如DeepSpeed、FSDP)可以重点关注,Intel oneMKL和LLVM后续若支持这条指令,能省掉不少显式同步开销。目前84分3评论的热度说明HN读者还没意识到这对AI infra的潜在价值,属于早期信号。

意见分歧 3 条评论

核心争论:新指令是实用性能优化还是ISA复杂度失控的又一例证

Lerc

Similar to a comment I made a few hours ago. I find myself expressing a concern that something has been lost when people never interact with something directly. Most of the discussion today is about AI and how that causes this issue, but I have been though this experience a few times now. This instr

muricula

I'm not sure it's so profound at all. The Intel vector ISA has always been filled with instructions with odd semantics and inscrutable names. They probably made a mistake in some deep corner case in their rounding implementation and had a choice between releasing the new instruction with the wrong s

ack_complete

You're assuming that the asm syntax is targeted at human readability, when it's at least as much to ease the complexity of the assembler and disassembler. If the FMA instruction syntax was designed for readability, then it would have used 4-argument syntax with a requirement for two registers to mat

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